Semiconductor Memories Interview Question Answer - 4

46	Which type of RAM has small amount of power in the standby mode?
	CMOS RAM
47	What should be word size and word capacities of the RAM?
	The RAM is available in the word size of 1, 4 or 8 bits. The word capacity of the RAM should be 1K, 2K, 4K, 8K etc.
48	Why the refreshing of data is necessary in the dynamic RAM?
	Dynamic RAM When the capacitor discharges, the data will disappear in the dynamic RAM therefore it requires refreshing of data periodically.
49	What is maximum time between refresh cycles in the DRAM?
	Two, four or eight Milli second
50	Explain the term : Address set up time, Write time interval, Set up time and Data hold time
	Address set up time The CPU drives read / write and control input lines LOW after small time interval is called as address set up time. Write time interval It is a time interval during the read / write and control input held low. Set up time It is time interval before the clock becomes active during which the data must be held constant. Data hold time It is minimum time interval after the clock becomes inactive during which the data must be held stable. The hold time can be negative.
51	What is significance of ‘read and write cycle time’?
	The read and write cycle time determines the time of operation of memory chip whether it is fast or slow.
52	Which type of RAM has highest speed?
	ECL ( Emitter coupled logic )
53	Describe the function of cache memory and scratch pad memory.
	Cache memory The ECL RAM is used as a scratch memory in which the data from a slower memory can be stored for quick access by a CPU. Scratch pad memory It is used for storage of the intermediate result of the mathematical calculations.
54	Why the open emitter output is provided for ECL RAM?
	The open emitter output is provided for ECL RAM in order to provide wire – ORing and for expansion.
55	Why separate pins are provided for input and output data for the ECL?
	In order to reduce delays between read and write operations
56	Describe the disadvantage of the DRAM? What is provision made to neutralize this disadvantage?
	Disadvantage of DRAM When a capacitor discharges, the data will disappear therefore the DRAM requires periodically refreshing the data. In order to neutralize this disadvantage Additional circuit is provided for memory refresh operation The integrated RAM is that include refresh circuit on the same chip. It is used only for small memory The LSI chip ( dynamic memory controllers ) which contain all logic for refreshing DRAM. It is used for large memory.
57	Why the DRAM is used as main internal memory in the personal computer?
	Due to high capacity and low power consumption
58	Which method is used to reduce number of pins in the high capacity DRAM?
	Address multiplexing
59	Explain the term : Burst refreshing
	Burst refreshing It is a refreshing method in which each row of cells refresh in sequence.  The normal memory operation is done only after the all rows have been refreshed.
60	Describe the function of dynamic RAM controllers.
	Function of Dynamic RAM controllers The dynamic RAM controllers is a special type of IC which handle refresh operation and address multiplexing needed by the dynamic RAM systems.
61	Explain the term : Pseudo – dynamic
	Pseudo – dynamic Some DRAM has in built refresh control circuit and it is called as pseudo – dynamic or Semi – dynamic.
62	What do you mean by memory expansion?
	Memory expansion The process of increasing word size by combing numbers of IC chip is called as expansion of memory.
63	What is NVRAM?
	NVRAM The full form of NVRAM is non volatile random access memory. It contains static RAM array and EEPROM array on the same chip. The NVRAM combines features of non – volatile storage capability of the EEPROM and high speed read / write operation of the static RAM.
64	What is access time for MOSFET RAM, TTL RAM and ECL RAM?
	Access Time MOSFET RAM : 200 – 400 Neno second TTL RAM : 25 to 50 Neno second ECL RAM : 5 to 10 Neno second

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